Electronic devices such as computers, laptops, personal video recorders (PVRs), MP3 players, game consoles, set-top boxes, digital cameras, and other electronic devices often need to store a large amount of data. Storage devices such as hard disk drives may be used to meet these storage requirements. The cost of data storage often has a significant impact on the overall cost of the device. Therefore, reducing the cost of data storage can dramatically impact the overall cost of these devices.
Referring now to FIGS. 1 and 2, data storage architecture 10 according to the conventional disk drive technology is shown. A hard drive assembly (HDA) printed circuit board (PCB) 14 includes a buffer 18 arranged thereon that stores data that is associated the control of a hard disk drive. The buffer 18 may employ SDRAM or other types of low latency memory. A processor 22 arranged on the HDA PCB 14 performs processing that is related to the operation of the hard disk drive. A hard disk controller (HDC) 26 communicates with an input/output interface 24 and with a spindle/voice coil motor (VCM) driver 30 and/or a read/write channel 34.
During write operation read/write channel 34 essentially encodes the data to be written onto a read/write device 59, as described in detail hereinbelow. The read/write channel 34 processes the signal for reliability and may include, for example error, correction coding (ECC), run length limited coding (RLL), and the like. During read operations, the read/write channel 34 converts an analog output of the read/write device 59 to a digital signal. The converted signal is then detected and decoded by known techniques to recover the data written on the hard disk drive.
As can be appreciated, one or more of the functional blocks of the HDA PCB 14 may be implemented by a single integrated circuit (IC) or chip. For example, the processor 22 and the HDC 26 may be implemented by a single chip. The spindle/VCM driver 30 and/or the read/write channel 34 may also be implemented by the same chip as the processor 22 and/or the HDC 26.
A hard drive assembly (HDA) 50 includes one or more hard drive platters 52 that include a magnetic coating that stores magnetic fields. The platters 52 are rotated by a spindle motor that is schematically shown at 54. Generally the spindle motor 54 rotates the hard drive platter 52 at a fixed speed during the read/write operations. One or more read/write arms 58 move relative to the platters 52 to read and/or write data to/from the hard drive platters 52. The spindle/VCM driver 30 controls the spindle motor 54, which rotates the platter 52. The spindle/VCM driver 30 also generates control signals that position the read/write arm 58, for example using a voice coil actuator, a stepper motor or any other suitable actuator.
A read/write device 59 is located near a distal end of the read/write arm 58. The read/write device 59 includes a write element such as an inductor that generates a magnetic field. The read/write device 59 also includes a read element (such as a magneto-resistive (MR) element) that senses the magnetic field on the platter 52. The HDA 50 includes a preamp circuit 60, which amplifies analog read/write signals. When reading data, preamp circuit 60 amplifies low level signals from the read element and outputs the amplified signal to the read/write channel device. While writing data, a write current is generated which flows through the write element of the read/write device 59 is switched to produce a magnetic field having a positive or negative polarity. The positive or negative polarity is stored by the hard drive platter 52 and is used to represent data.
Application PCB 70 in FIG. 1 includes a parallel I/O interface 72 that communicates with the parallel I/O interface 24 of the HDA PCB 14. The application PCB 70 further includes an application processor 74 arranged thereon that performs application-related processing. A buffer 78 is also arranged on the application PCB and stores application-related data. The application PCB 70 includes one or more application specific integrated circuits (ASIC) 80 or other custom circuits arranged thereon that perform customer specific functions. Exemplary custom functions include PVR functions, set-top box functions, game console functions, MP3 coding/decoding functions, MPEG coding/decoding functions, encryption, or any other function.
The I/O interfaces 24 and 72 between the application PCB 70 and the HDA PCB 14 can be parallel interfaces as shown in FIG. 1. Alternately, serial interfaces can be used. The serial interfaces can be conventional serial interfaces or serial ATA interfaces.
The application processor 74 addresses data on the hard drive platter 52 using logical addresses but not physical addresses. In other words, the HDA PCB 14 is “smart” and the application processor 74 does not have the flexibility to address the data on the hard drive platter 52 at the physical address level. This lack of flexibility leads to some performance disadvantages. For example, most HDAs employ error correction, which may not be suitable for some data applications such as video. Head location and/or status of sector locations is not known by the application. Therefore, when the application requests data, the application may wait until the head is positioned properly. This interrupt and/or overhead could have been used for other processing tasks.